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Dean's Referred Conference Papers

  1. Zhi-Wei Liu, Shen-Li Chen*, Jhong-Yi Lai, Xing-chen Mai, Yu-Jie Chung, "Enhance the ESD Reliability of HV pLDMOS Transistors with the Embedded Horizontal SCR and Schottky Diode Techniques," The 5th IEEE International Future Energy Electronics Conference, Taipei, Taiwan, Nov. 2021. (accepted)
  2. Jhong-Yi Lai, Shen-Li Chen*, Zhi-Wei Liu, Yu-Jie Chung, Xing-chen Mai, "ESD-capability Improvement of Ultra-high Voltage nLDMOS Components by Drain Side Engineer," The 5th IEEE International Future Energy Electronics Conference, Taipei, Taiwan, Nov. 2021. (accepted)
  3. Xing-Chen Mai, Shen-Li Chen* , Shi-Zhe Hong , Jhong-Yi Lai, Zhi-Wei Liu and Yu-Jie Chung, " Study on the ESD Immunity of High-voltage pLDMOS with the Vertical Parasitic Schottky/SCR Structures in the Drain Electrode," 8th IEEE & 9th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2021), Taitung, Taiwan, Oct. 2021. (accepted)
  4. Jhong-Yi Lai, Shen-Li Chen*, Zhi-Wei Liu, Yu-Jie Chung and Xing-Chen Mai, " Research on ESD Reliability of Ultra-high Voltage nLDMOSs Modulated by Different Operating Voltages," 8th IEEE & 9th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2021), Taitung, Taiwan, Oct. 2021. (accepted)
  5. Zhi-Wei Liu, Shen-Li Chen*, Jhong-Yi Lai, Xing-Chen Mai and Yu-Jie Chung, "ESD Study of the Concentric Poly2 with Different Potentials and the Discrete HVPW Modulation on Circular Ultra-high Voltage nLDMOS Devices," 8th IEEE & 9th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2021), Taitung, Taiwan, Oct. 2021. (accepted)
  6. 賴忠義、陳勝利*、林柏霖、劉誌瑋、麥新承, "超高壓nLDMOS操作電壓調整對ESD可靠度能力探討," T-ESD & Reliability Conference, Hsinchu, Taiwan, Nov. 2021. (accepted)
  7. Zhi-Wei Liu, Shen-Li Chen*, Jhong-Yi Lai, Xing-Chen Mai, "圓形超高壓nLDMOS同心圓式Poly 2與漂移區超接面離散調變對抗ESD能力之影響," T-ESD & Reliability Conference, Hsinchu, Taiwan, Nov. 2021. (accepted)
  8. Zhi-Wei Liu, Shen-Li Chen*, Sheng-Kai Fan, Shi-Zhe Hong, Tien-Yu Lan, Yu-Jie Zhou and Jhong-Yi Lai, " ESD-capability Improvement of the Embedded Horizontal SCR Modulation for HV pLDMOS Devices," The 4th NIT-NUU Bilateral Academic Conference, Miaoli, Taiwan, Sep. 202. (accepted)
  9. Jhong-Yi Lai, Shen-Li Chen*, Tien-Yu Lan, Yu-Jie Zhou, Shi-Zhe Hong and Zhi-Wei Liu, "ESD Protection Study of Ultra-high Voltage nLDMOS Device's Applications," The 4th NIT-NUU Bilateral Academic Conference, Miaoli, Taiwan, Sep. 202. (accepted)
  10. Yu-Jie Zhou, Shen-Li Chen*, Tien-Yu Lan, Shi-Zhe Hong, Zhi-Wei Liu and Zhong-Yi Lai, " Improved UHV IGBTCell for ESD Protection with High Holding Voltage via a 0.5μm BCD Process," IEEE International Conference on Consumer Electronics (ICCE-TW), Penghu, Taiwan, Sep. 2021. (accepted)
  11. Shi-Zhe Hong, Shen-Li Chen*, Tien-Yu Lan, Yu-Jie Zhou, Zhi-Wei Liu, and Jhong-Yi Lai, "ESD-Immunity Impact of HV pLDMOS with Drain-side Embedded Horizontal P-type Schottky Modulations," IEEE International Conference on Consumer Electronics (ICCE-TW), Penghu, Taiwan, Sep. 2021. (accepted)
  12. Tien-Yu Lan, Shen-Li Chen*, Yu-Jie Zhou, Shi-Zhe Hong, Chung-Yi Lai, Zhi-Wei Liu, "Holding-voltage Improvement of UHV Circular nLDMOS Transistors by the Drain-side SCR Engineering," IEEE International Conference on Consumer Electronics (ICCE-TW), Penghu, Taiwan, Sep. 2021. (accepted)
  13. 劉誌瑋, 陳勝利*, 范盛凱, 洪士哲, 藍天輿, 周昱杰, 賴忠義, "車用HV pLDMOS 元件汲極內建水平SCR調變對ESD能力探討," 第一屆台灣智慧電動車及綠能科技研討會, 台灣台中, Jul.23, 2021, pp.E05-1-E05-4.
  14. 賴忠義, 陳勝利*, 藍天輿, 周昱杰, 洪士哲, 劉誌瑋, "綠能用超高壓nLDMOS元件汲極端工程之靜電放電防護能力提升探討," 第一屆台灣智慧電動車及綠能科技研討會, 台灣台中, Jul.23, 2021, pp. E11-1- E11-3.
  15. Yu-jie Zhou, Shen Li Chen, Tien-Yu Lan, Shi-Zhe Hong, Zhong-Yi Lai and Liu Zhi-Wei, "ESD Reliability Design of IGBT Cells with Parasitic Schottky Diodes in the Drain Side," 7th IEEE & 8th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2021), Kinmen, Taiwan, Apr. 2021, pp.#O 202796350-1-202796350-1.
  16. Shi-Zhe Hong, Shen-Li Chen, Tien-Yu Lan, Yu-Jie Zhou, Zhi-Wei Liu, and Jhong-Yi Lai, "ESD-Robustness Study of HV nLDMOS with Drain-side Embedded Parasitic Schottky/SCR Device Modulations," 7th IEEE & 8th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2021), Kinmen, Taiwan, Apr. 2021, pp.#O129130434-1-129130434-1.
  17. Tien-Yu Lan, Shen-Li Chen*, Yu-Jie Zhou, Shi-Zhe Hong, Chung-Yi Lai, Zhi-Wei Liu, "ESD-ability Investigation of the Elliptical UHV nLDMOS Transistors by the Different Types SCR in the Drain Side," 7th IEEE & 8th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2021), Kinmen, Taiwan, Apr. 2021, pp.#O127711230-1-127711230-1.
  18. Yu-Jie Zhou, Shen-Li Chen*, Tien-Yu Lan, Shi-Zhe Hong, Liu Zhi-Wei and Zhong-Yi Lai, "ESD Reliability Design of IGBT Cells with Parasitic Schottky Diodes in the Drain Side," IEEE 7th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2020), Penghu, Taiwan, Nov. 2020, pp. 395815-1-395815-1.
  19. Shi-Zhe Hong, Shen-Li Chen*, Sheng-Kai Fan, Tien-Yu Lan, Yu-Jie Zhou, Jhong-Yi Lai and Zhi-Wei Liu, "New Methods to Improve ESD Immunity on HV pLDMOS Devices with Drain-side Embedded Horizontal SCR Modulations," IEEE 7th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2020), Penghu, Taiwan, Nov. 2020, pp. 282651-1-282651-1.
  20. Tien-Yu Lan, Shen-Li Chen*, Yu-Jie Zhou, Shi-Zhe Hong, Zhi-Wei Liu and Jhong-Yi Lai, "SH_P Ring and Concentration Gradient for ESD Enhancement in UHV Circular nLDMOS Transistors," IEEE 7th The International Conference on Science, Education, and Viable Engineering (ICSEVEN 2020), Penghu, Taiwan, Nov. 2020, pp. 214448-1-214448-1.
  21. Yu–Jie Zhou , Shen-Li Chen*, Pei-Lin Wu, Po-Lin Lin, Sheng-Kai Fan, Tien-Yu Lan, Shi-Zhe Hong, "ESD-capability Enhancement of Ultra-high Voltage nLDMOSs by the DPW Discrete Layer," 3rd IEEE International Conference on Knowledge Innovation and Invention (ICKII), Kaohsiung, Taiwan, Aug. 2020. (accepted)
  22. Tien-Yu Lan, Shen-Li Chen*, Po-Lin Lin, Sheng-Kai Fan, Yu-Jie Zhou, Shi-Zhe Hong and Hung-Wei Chen, "ESD-ability Design of UHV Circular nLDMOS Transistors by the Super-junction Length's Modulation and Concentration Gradient," 3rd IEEE International Conference on Knowledge Innovation and Invention (ICKII), Kaohsiung, Taiwan, Aug. 2020. (accepted)
  23. Shi-Zhe Hong, Shen-Li Chen*, Sheng-Kai Fan, Po-Lin Lin, Tien-Yu Lan, and Yu-Jie Zhou, "Strengthening the ESD Reliability of HV nLDMOSs with Drain-side Embedded Horizontal-type Schottky Devices," 3rd IEEE International Conference on Knowledge Innovation and Invention (ICKII), Kaohsiung, Taiwan, Aug. 2020. (accepted)
  24. Po-Lin Lin, Shen-Li Chen*, Sheng-Kai Fan, Tien-Yu Lan, Yu-Jie Zhou and Shi-Zhe Hong, "Improving the ESD Robustness of an Ultra-high voltage nLDMOS Device with the Embedded Schottky Diode," IEEE International Conference on Consumer Electronics (ICCE-TW), Taoyuan, Taiwan, Sep. 2020,pp. 1-2.
  25. Sheng-Kai Fan, Shen-Li Chen*, Po-Lin Lin, Shi-Zhe Hong, Tien-Yu Lan and Yu-Jie Zhou, "A Novel SCR-based Schottky Diode and Lightly P-well Additions of HV 60V nLDMOS on ESD Capability," IEEE International Conference on Consumer Electronics (ICCE-TW), Taoyuan, Taiwan, Sep. 2020,pp. 1-2.
  26. Tien-Yu Lan, Shen-Li Chen*, Hung-Wei Chen, Sheng-Kai Fan, Po-Lin Lin, Yu-Jie Zhou and Shi-Zhe Hong, "ESD-capability Influences of UHV Circular nLDMOS Transistors by the Drain-side Ladder-Step STI," IEEE International Conference on Consumer Electronics (ICCE-TW), Taoyuan, Taiwan, Sep. 2020,pp. 1-2.
  27. 洪士哲, 陳勝利*, 范盛凱, 林柏霖, 藍天輿, 周昱杰, "電力轉換系統中之高壓LDMOS ESD可靠度強化研究," 全國系統科學與工程會議 (National Symposium on Systems Science and Engineering), Taichung, Taiwan, June 2020, pp.1081-1-1081-1.
  28. 藍天輿, 陳勝利*, 林柏霖, 范盛凱, 周昱杰, 洪士哲, "電力系統用之超高壓300V nLDMOS汲極端工程對ESD能力影響," 全國系統科學與工程會議(National Symposium on Systems Science and Engineering), Taichung, Taiwan, June 2020, pp.1082-1-1082-1.
  29. Po-Lin Lin, Shen-Li Chen*, "Promote the ESD Reliability on 300-V Ultra-high Voltage nLDMOS Devices with the Novel Embedded Schottky Diode," 27th Symposium on Nano Device Technology, Hsinchu, Taiwan, May 2020, pp. CC00057-1- CC00057-1.
  30. Sheng-Kai Fan, Shen-Li Chen*, "Impacts of ESD Reliability on HV 60-V pLDMOS Devices by the Embedded SCR and Heterojunction Diode," 27th Symposium on Nano Device Technology, Hsinchu, Taiwan, May 2020, pp. CC00062-1- CC00062-1.
  31. Shen-Li Chen*, Sheng-Kai Fan, Po-Lin Lin, Shi-Zhe Hong, Tien-Yu Lan and Yu-Jie Zhou, "利用汲極寄生接面元件提升高壓LDMOS 之抗ESD可靠度能力", T-ESD & Reliability Conference, Hsinchu, Taiwan, Nov. 2019, pp. B3-1 - B3-4.
  32. Shen-Li Chen*, Po-Lin Lin, Sheng-Kai Fan, Yu-Jie Zhou, Tien-Yu Lan and Shi-Zhe Hong, "超高壓LDMOS汲極端漂移區調變與寄生蕭特基二極體之抗ESD能力探討", T-ESD & Reliability Conference, Hsinchu, Taiwan, Nov. 2019, pp. B2-1 - B2-4.
  33. Po-Lin Lin, Shen-Li Chen*, Pei-Lin Wu, Yu-Lin Jhou and Sheng-Kai Fan, "Evaluating the Drift-region Length Effect of nLDMOS on ESD Ability with a TLP Testing System," IEEE 8th Global Conference on Consumer Electronics (GCCE), Osaka, Japan, Oct. 2019, pp.83-84.
  34. Sheng Kai Fan, Shen-Li Chen*, Yu-Lin Jhou, Pei-Lin Wu, and Po-Lin Lin, "ESD Immunity Impacts of the Drain-side Heterojunction Device Addition in HV 60 V n/pLDMOS Devices," IEEE 8th Global Conference on Consumer Electronics (GCCE), Osaka, Japan, Oct. 2019, pp.81-82.
  35. Sheng-Kai Fan, Shen-Li Chen*, Po-Lin Lin, Shi-Zhe Hong, Tien-Yu Lan and Yu-Jie Zhou, "The Impact of Drift-region Length Reduction of n/pLDMOS on ESD Ability by TLP Measurements," IEEE Eurasia Conference on IOT, Communication and Engineering, Yunlin, Taiwan, Oct. 2019, pp.199-120.
  36. Po-Lin Lin, Shen-Li Chen*, Sheng-Kai Fan, Yu-Jie Zhou, Tien-Yu Lan and Shi-Zhe Hong, "ESD-Immunity Influence of Ultra-high Voltage nLDMOS as the Drift Region Embedded a P-well," IEEE Eurasia Conference on IOT, Communication and Engineering, Yunlin, Taiwan, Oct. 2019, pp.411-412.
  37. 陳勝利*, 周裕琳, 吳沛霖, 范盛凱, 林柏霖, 洪士哲, 藍天輿, 周昱杰, "高壓60V n/pLDMOS 汲極端異質接面對ESD靜電防護能力之影響," 第十六屆台灣電力電子研討會, Kaohsiung, Taiwan, Sep. 2019, pp. PE-013-94-1 - PE-013-94-5.
  38. 陳勝利*, 吳沛霖, 周裕琳, 林柏霖, 范盛凱, 周昱杰, 藍天輿, 洪士哲, "圓形300V nLDMOS 源極端/體極端接觸窗離散工程之抗ESD能力探討," 第十六屆台灣電力電子研討會, Kaohsiung, Taiwan, Sep. 2019, pp. PE-013-92-1 - PE-013-92-5.
  39. Shen-Li Chen*, Yu-Lin Jhou, Sheng-Kai Fan, Po-Lin Lin, "Effect of High-voltage nLDMOS in the Drain-side with Parasitic Schottky Diode and N+ Area Modulation on ESD Capability," International Conference On Electrical and Electronics Engineering(ICEEE), Zurich, Switzerland, Aug. 2019, pp.1-4.
  40. Shen-Li Chen*, Pei-Lin Wu, Yu-Lin Jhou, Po-Lin Lin and Sheng Kai Fan, "ESD-Protection Design of UHV Circular nLDMOSs by the Drift Region with Elliptical Cylinder Super-junctions," International Conference of advanced Technology Innovation, Sapporo, Japan, Jul. 2019. (accepted & Honorable Mentions winner)
  41. Sheng Kai Fan, Shen-Li Chen*, Yu-Lin Jhou, Pei-Lin Wu, and Po-Lin Lin, "Channel- & Drift Region's STI-Lengths Impacts of ESD Immunity in HV 60 V nLDMOS Devices," IEEE International Conference on Consumer Electronics (ICCE), Yilan, Taiwan, May 2019, pp.1-2.
  42. Po-Lin Lin, Shen-Li Chen*, Pei-Lin Wu, Yu-Lin Jhou and Sheng-Kai Fan, "ESD-Reliability Investigation of an UHV Elliptical LDMOS-SCR by the Drain-Side Junction Replacement," IEEE International Conference on Consumer Electronics (ICCE), Yilan, Taiwan, May 2019, pp.1-2.
  43. Shen-Li Chen*, Pei-Lin Wu, Yu-Lin Jhou, Po-Lin Lin and Sheng Kai Fan, "Robust the ESD Reliability by Drain-side Super-junction for the UHV Circular nLDMOS," IEEE International Conference on Advanced Manufacturing, Yunlin, Taiwan, Nov. 2018, pp. 142-143.
  44. Shen-Li Chen*, Yu-Lin Jhou, Pei-Lin Wu, Sheng-Kai Fan and Po-Lin Lin, "ESD-Immunity Influence of 60-V pLDMOS by the Floating Polysilicon on Drain-side STI," IEEE International Conference on Advanced Manufacturing, Yunlin, Taiwan, Nov. 2018, pp. 318-319.
  45. Shen-Li Chen*, Yu-Lin Jhou, Pei-Lin Wu, Sheng-Kai Fan and Po-Lin Lin, "漂移區浮接多晶矽對高壓 pLDMOS ESD能力影響之探討," T-ESD & Reliability Conference, Hsinchu, Taiwan, Nov. 2018, pp. C3-1- C3-5.
  46. Shen-Li Chen*, Pei-Lin Wu, Yu-Lin Jhou, Po-Lin Lin and Sheng Kai Fan, "圓形300V超高壓nLDMOS 汲極端超接面之ESD可靠度強化," T-ESD & Reliability Conference, Hsinchu, Taiwan, Nov. 2018, pp. C2-1- C2-5
  47. Shen-Li Chen*, Yi-Hao Chiu, Yu-Lin Jhou, Pei-Lin Wu, Po-Lin Lin, Yu-Jen Chen, "ESD-Reliability Enhancement in a High-voltage 60 V Square-type pLDMOS by the Guard-Ring Engineering," IEEE Asia-Pacific Microwave Conference, Kyoto, Japan, Nov. 2018, pp.785-787.
  48. Yu-Jen Chen and Shen-Li Chen*, "Electrostatic-Discharge Behaviour and Analysis of a Power Management IC," IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition, Nagoya, Japan, Aug. 2018, pp.1-2.
  49. Shen-Li Chen*, Yi-Hao Chiu, Chih-Hung Yang, Chun-Ting Kuo, Yu-Lin Lin, Yi-Hao Chiu, Yi-Hao Chao, Jen-Hao Lo, Yu-Lin Jhou, Pei-Lin Wu, "NBL Layer Impacts on ESD Reliability for 60-V Power pLDMOS Transistors," IEEE International Conference on Consumer Electronics – Taiwan, Taichung, Taiwan, May 2018, pp.1-2.
  50. Shen-Li Chen*, Yu-Lin Lin, Yi-Cih Wu, Yi-Hao Chao, Yi-Hao Chiu, Pei-Lin Wu, Yu-Lin Jhou, Chun-Ting Kuo, Jen-Hao Lo, "An Upgrade of ESD-Reliability in HV 60-V nLDMOS Devices by the Drain-Side Engineering," IEEE International Symposium on Next-Generation Electronics, Taipei, Taiwan, May 2018, pp.1-2.
  51. Shen-Li Chen*, Yi-Hao Chao, Chih-Ying Yen, Jen-Hao Lo, Chun-Ting Kuo, Yu-Lin Lin, Yi-Hao Chiu, Pei-Lin Wu, Yu-Lin Jhou, "Design and Enhancement of ESD Reliability in Circular UHV 300-V nLDMOS Power Components," IEEE International Power Electronics Conference (IPEC-Niigata-ECCE Asia), Niigata Japan, May 2018, pp.1145-1148.
  52. Shen-Li Chen*, Yi-Hao Chiu, Chun-Ting Kuo, Yu-Lin Lin, Yi-Hao Chao, Jen-Hao Lo, Pei-Lin Wu, Yu-Lin Jhou, "高壓60V方形 pLDMOS 增強ESD可靠度能力之保護環工程," 第十六屆微電子技術發展與應用研討會, May 2018, pp. 45-48 (ISBN: 986055747-0).
  53. Shen-Li Chen*, Jen-Hao Lo, Yi-Hao Chao, Yu-Lin Lin, Yi-Hao Chiu, Chun-Ting Kuo, Yu-Lin Jhou, Pei-Lin Wu, "圓形超高壓300V nLDMOS 之可靠度能力提升策略," 第十六屆微電子技術發展與應用研討會, May 2018, pp.49-52 (ISBN: 986055747-0).
  54. Shen-Li Chen*, Chih-Hung Yang, Yu-Lin Lin, Chun-Ting Kuo, Jen-Hao Lo, Yi-Hao Chiu, Yi-Hao Chao, Yu-Lin Jhou, Pei-Lin Wu, "汲極SCR工程對60V功率nLDMOS組件之抗ESD能力提升探討," 第20 屆全國機構與機器設計學術研討會, Changhua, Taiwan, Nov. 2017, pp. B1-3-1-B1-3-7.
  55. Shen-Li Chen*, Chih-Hung Yang, Yi-Hao Chiu, Chun-Ting Kuo, Yu-Lin Lin, Yi-Hao Chao, Jen-Hao Lo, Yu-Lin Jhou, Pei-Lin Wu, "高壓60V nLDMOS 增強ESD可靠度能力之源極端工程," T-ESD & Reliability Conference, Hsinchu, Taiwan, Nov. 2017, pp. A4-1-A4-6.
  56. Shen-Li Chen*, Chih-Ying Yen, Jen-Hao Lo, Yi-Hao Chao, Chun-Ting Kuo, Yu-Lin Lin, Yi-Hao Chiu, Pei-Lin Wu, Yu-Lin Jhou, "圓形超高壓-300V nLDMOS 特性及抗ESD能力探討," T-ESD & Reliability Conference, Hsinchu, Taiwan, Nov. 2017, pp. A5-1-A5-5.
  57. Shen-Li Chen*, Yi-Cih Wu, Chih-Hung Yang, Chih-Ying Yen, Kuei-Jyun Chen, Jia-Ming Lin, Yi-Hao Chiu, Yu-Lin Lin, Chun-Ting Kuo, Jen-Hao Lo, Yi-Hao Chao, Hung-Wei Chen, "Source-end Design and Failure Study for ESD Enhancement of 60 V nLDMOS Devices," IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2017), Chengdu, China, Jul. 2017, pp.1-4.
  58. Shen-Li Chen*, Chih-Hung Yang, Chih-Ying Yen, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin, Chun-Ting Kuo, Yu-Lin Lin, Yi-Hao Chiu, Yi-Hao Chao, Jen-Hao Lo, Hung-Wei Chen, "Novel Parasitic-SCR Impacts on ESD Robustness in the 60 V Power pLDMOS Devices," International Conference on Consumer Electronics – Taiwan, Taipei, Jun. 2017, pp. 381-382.
  59. Shen-Li Chen*, Chih-Hung Yang, Kuei-Jyun Chen, Yi-Cih Wu, Yu-Lin Lin, Yi-Hao Chiu, Chun-Ting Kuo, Chih-Ying Yen, Jia-Ming Lin, Yi-Hao Chao, Jen-Hao Lo, " ESD-Improvement Comparisons of HV n-/p-LDMOS Components by the Bulk Modulations," IEEE International Future Energy Electronics Conference- ECCE Asia, Kaohsiung City, Taiwan, Jun. 2017, pp. 2182-2186.
  60. Yu-Jen Chen, Shen-Li Chen*, Min-Hua Lee, "ESD-Reliability Influence on LV/HV MOSFET Devices by Different Zapping-voltage Steps in the Transmission-Line Pulse Testing," IEEE International Conference on Applied System Innovation, Sapporo, Japan, May 2017, pp.1407-1410.
  61. Shen-Li Chen*, Chih-Ying Yen, Chih-Hung Yang, Yi-Cih Wu, Kuei-Jyun Chen, Yu-Lin Lin, Yi-Hao Chiu, Yi-Hao Chao, Hung-Wei Chen, Dylan Chen, Marty Lo, Jia-Ming Lin, Chun-Ting Kuo, Jen-Hao Lo, "ESD-Immunity Evaluations of a 40 V nLDMOS with Embedded SCRs in the Drain Side," IEEE International Symposium on Next-Generation Electronics, Keelung, Taiwan, May 2017, pp. 1-2.
  62. Shen-Li Chen*, Jia-Ming Lin, Chih-Ying Yen, Yi-Hao Chao, Jen-Hao Lo, Kuei-Jyun Chen, Chih-Hung Yang, Yi-Cih Wu, Yi-Hao Chiu, Yu-Lin Lin, Chun-Ting Kuo, "Channel Length, Drift-region Distance, and Unit-Finger Width Impacts on the HBM Robustness for the 600 V N-Channel LDMOS Transistors," International Conference on Engineering and Advanced Technology, Hong Kong, Dec. 2016, pp. 198-203.
  63. Shen-Li Chen*, Chih-Ying Yen, Jia-Ming Lin, Jen-Hao Lo, Yi-Hao Chao, Yi-Cih Wu, Kuei-Jyun Chen, Chih-Hung Yang, Chun-Ting Kuo, Yi-Hao Chiu, Yu-Lin Lin, "HBM-Reliability Influences of Channel Length and Drift-region Modulations in the 600 V UHV N-channel LDMOS Devices," International Electron Devices and Materials Symposium (IEDMS-2016), Taipei City, Taiwan, Nov. 2016, pp.19-1-19-2.
  64. Shen-Li Chen*, Yu-Ting Huang, Chih-Hung Yang, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin, Chih-Ying Yen, "ESD Reliability Improvement by the Source-Discrete Placement in a 45-V pLDMOS-SCR (npn-Type)," IEEE 6th International Conference on Power and Energy (PECON), Melaka, Malaysia, Nov. 2016, pp. 68-71.
  65. Shen-Li Chen*, Yu-Ting Huang, Chih-Ying Yen, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin, and Chih-Hung Yang, "ESD Protection Structure Design for the 45-V pLDMOS-SCR (p-n-p-Arranged) Devices with Source-Discrete Distributions," IEEE 5th Global Conference on Consumer Electronics (GCCE), Kyoto, Japan, Oct. 2016, pp. 1-2.
  66. Shen-Li Chen*, Yu-Ting Huang, Chih-Ying Yen, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin, and Chih-Hung Yang, "ESD Protection Structure Design with Source-Isolated Distributions for the pLDMOS on a 60-V Process," 5th International Multi-Conference on Engineering and Technology Innovation, Taichung, Taiwan, Oct. 2016. (accepted)
  67. Shen-Li Chen*, Min-Hua Lee, and Tzung-Shian Wu, "Influences of Substrate Pickup Integrated with the Source-end Engineering on ESD/Latch-up Reliabilities in a 0.35-m 3.3-V Process," IEEE International Symposium on Computer, Consumer and Control, Xi'an, China, Jul. 2016, pp. 632 - 635.
  68. Shen-Li Chen*, Yi-Cih Wu, Jia-Ming Lin, Chih-Hung Yang, Chih-Ying Yen, Kuei-Jyun Chen, Hung-Wei Chen, "ESD Reliability Improvement of the 0.25-m 60-V Power nLDMOS with Discrete Embedded SCRs Separated by STI Structures," IEEE 8th International Power Electronics and Motion Control Conference - ECCE Asia, Hefei, Anhui, China, May 2016, pp.1611-1614.
  69. Shen-Li Chen*, Yu-Ting Huang, Yi-Cih Wu, Jia-Ming Lin, Chih-Hung Yang, and Chih-Ying Yen, and Kuei-Jyun Chen,, "ESD-Reliability Characterizations of a 45-V p-Channel LDMOS-SCR with the Discrete-Cathode End," IEEE International Conference on Applied System Innovation, Okinawa, Japan, May 2016, pp. 1-2.
  70. Shen-Li Chen*, Chih-Hung Yang, Chih-Ying Yen, Kuei-Jyun Chen, Yi-Cih Wu, and Jia-Ming Lin, "Design on ESD Robustness of Source-side Discrete Distribution in the 60-V High-Voltage nLDMOS Devices," IEEE International Conference on Consumer Electronics–Nantou, Taiwan, May 2016, pp.1-2.
  71. Shen-Li Chen*, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin, Chih-Hung Yang, and Chih-Ying Yen, "ESD Reliability Evaluations of the 60-V nLDMOS by the Drain-side Discrete SCRs," IEEE International Symposium on Next-Generation Electronics, Hsinchu, Taiwan, May 2016, pp.1-2.
  72. Shen-Li Chen*, Kuei-Jyun Chen, Jia-Ming Lin, Chih-Hung Yang, Chih-Ying Yen, and Yi-Cih Wu, "Anti-ESD Study of nLDMOS with Drain-side Embedded SCR and Isolated STI Structures," International Electron Devices and Materials Symposium (IEDMS-2015), pp. B10-1~B10-2, Kaohsiung City, Taiwan, Nov. 2015.
  73. Shen-Li Chen*, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin, Chih-Hung Yang, and Chih-Ying Yen, "nLDMOS汲極端寄生SCR 暨STI隔離調變之抗ESD能力探討," T-ESD & Reliability Conference, pp. D3-1~D3-5, Hsinchu, Taiwan, Nov. 2015.
  74. Shen-Li Chen*, Yi-Cih Wu, Jia-Ming Lin, Chih-Hung Yang, Chih-Ying Yen, and Kuei-Jyun Chen, "60-V nLDMOS汲極端離散分佈式SCR之抗ESD可靠度分析," T-ESD & Reliability Conference, pp. D4-1~D4-5, Hsinchu, Taiwan, Nov. 2015.
  75. Shen-Li Chen*, Shawn Chang, Yu-Ting Huang, Chih-Ying Yen, Kuei-Jyun Chen, Yi-Cih Wu, Jia-Ming Lin, and Chih-Hung,Yang, "Impacts on the Anti-ESD/ Anti-LU Immunities by the Drain-side Superjunction Structure of HV/ LV nMOSFETs," IEEE International Future Energy Electronics Conference, pp. 1-5, Taipei, Taiwan, Nov. 2015.
  76. Shen-Li Chen*, Yu-Ting Huang, "Drain Side Super Junctions Co-worked with "npn" Arranged SCRs on ESD Robustness in the 60-V nLDMOS Devices," International Technical Conference of IEEE Region 10 (TENCON), pp. 1-4, Macau, China, Nov. 2015.
  77. Shen-Li Chen*, Yu-Ting Huang, Chih-Hung Yang, Chih-Ying Yen, Kuei-Jyun Chen, Yi-Cih Wu, and Jia-Ming Lin, "Drain Side N+ Layout Manners ("npnpn" Arranged-type) on ESD Robustness in the 60-V pLDMOS-SCR", 12th International Symposium on Measurement Technology and Intelligent Instruments, Taipei, Taiwan, Sep. 2015. (accepted)
  78. Shen-Li Chen*, Dun-Ying Shu, "By Using Grey System and Neural-Fuzzy Network Methods to obtain the Threshold Voltage of Submicron n-MOSFET DUTs", IEEE 12th International Conference on Fuzzy Systems and Knowledge Discovery (FSKD), pp. 501-505, Zhangjiajie, China, Aug. 2015.
  79. Shen-Li Chen*, Yu-Ting Huang,"Drain-Side Discrete-Distributed Layout Influences on Reliability Issues in the 0.25 m 60-V Power pLDMOS", 9th IEEE International Conference on Power Electronics – ECCE Asia, pp. 581-587, Seoul, Korea, Jun. 2015.
  80. Shen-Li Chen*, Shawn Chang, Yu-Ting Huang, Shun-Bao Chang, "Anti-ESD Impacts on 60-V P-channel LDMOS Devices as None-ODs Zone Inserting in the Bulk Region", IEEE International Conference on Consumer Electronics, pp. 266-267, Taipei, Taiwan, Jun. 2015.
  81. Shen-Li Chen*, Yu-Ting Huang, Shawn Chang, Shun-Bao Chang, "ESD Reliability Building in 0.25 m 60-V p-channel LDMOS DUTs with Different Embedded SCRs", IEEE International Conference on Consumer Electronics, pp. 268-269, Taipei, Taiwan, Jun. 2015.
  82. Shen-Li Chen*, Chun-Ju Lin, Shawn Chang, Yu-Ting Huang, and Shun-Bao Chang, " ESD Reliability Comparison of Different Layout Topologies in the 0.25-m 60-V nLDMOS Power Devices", IEEE International Symposium on Next-Generation Electronics, pp. T4-4-1- T4-4-4, Taipei, Taiwan, May 2015.
  83. Shen-Li Chen*, Yu-Ting Huang, Shawn Chang, and Shun-Bao Chang, "Influences of Drain Side P+ Discrete-Islands on ESD Robustness in the 60-V pLDMOS-SCR ("PNPNP" Arranged-type)", IEEE International Symposium on Next-Generation Electronics, pp. T4-5-1- T4-5-4, Taipei, Taiwan, May 2015.
  84. Shen-Li Chen*, Shawn Chang, Yu-Ting Huang, Shun-Bao Chang, "Reliability and Electrical Performance Influences by the Bulk-FOX Adding in 60-V pLDMOS Power Devices", IEEE 10th International Green Energy Conference (IGEC-X), pp. 1382-1-1382-4, Taichung, Taiwan, May 2015.
  85. Shen-Li Chen*, Yu-Ting Huang, Shawn Chang, Shun-Bao Chang, "Impacts of Drain-side "npn" Modulated-type SCRs on ESD Immunity in 60-V pLDMOS Power Components", IEEE 10th International Green Energy Conference (IGEC-X), pp. 1407-1-1407-4, Taichung, Taiwan, May 2015.
  86. Shen-Li Chen* and Su-Ping Lee, "An Optimized Design of Performance Parameters for a 100V High-voltage N-channel LDMOS", International Conference on Power Electronics and Energy Engineering (PEEE), pp. 22-25, Phuket, Thailand, Apr. 2015.
  87. Shen-Li Chen*, Chun-Ju Lin, Yu-Ting Huang, and Shawn Chang, "Layout Structure Dependence of 60-V nLDMOS DUTs in Reliability Considerations," IEEE 3rd Global Conference on Consumer Electronics, Tokyo, Japan, Oct. 2014. (accepted)
  88. Shen-Li Chen*, Shawn Chang, Yu-Ting Huang, Shun-Bao Chang, "FOD Adding Dependences on 60-V pLDMOS Power DUTs in ESD Considerations," International Forum on Systems and Mechatronics (IFSM), Tainan, Taiwan, pp. E07-1~E07-8, Oct. 2014.
  89. Shen-Li Chen*, Yu-Ting Huang, Shawn Chang, Shun-Bao Chang, "Layout-Type Influences of Anti-ESD Ability in 60-V pLDMOS Power DUTs with the Embedded SCR," International Forum on Systems and Mechatronics (IFSM), Tainan, Taiwan, pp. E16-1~E16-9, Oct. 2014.
  90. Shen-Li Chen* and Chin-Chai Chen, "Photoluminescence Characteristic Enhancement of an n-GaN Blue LED material After a Dry Etching Process by Annealing Treatment", 6th International Symposium on Functional Materials (ISFM), Singapore, pp. 190-193, Aug. 2014.
  91. Shen-Li Chen*, Min-Hua Lee, "TLP Characterization and Leakage-Biasing-Voltage (VLB) Correlations in MOSFET Measurements," IEEE International Symposium on Computer, Consumer and Control, Taichung, Taiwan, pp. 199~202, Jun. 2014.
  92. Shen-Li Chen*, Chin-Chai Chen, "Annealing Treatment Influence on Photoluminescence of the n-GaN Blue LED After a Dry Etching Process," IEEE International Symposium on Computer, Consumer and Control, Taichung, Taiwan, pp. 203~206, Jun. 2014.
  93. Shen-Li Chen*, Min-Hua Lee, "ESD Reliability Influence of a 60 V Power LDMOS by the FOD-Based (& Dotted-OD) Drain," IEEE International Power Electronics Conference, Hiroshima, Japan, pp. 236~239, May 2014.
  94. Shen-Li Chen*, Min-Hua Lee, Chun-Ju Lin, Yi-Sheng Lai, Shawn Chang, Yu-Ting Huang, "Robust Design of HV pLDMOS-ESCR Structures in a 60-V BCD Process", IEEE International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, pp. Y1-11-1~Y1-11-4, May 2014.
  95. Shen-Li Chen*, Min-Hua Lee, Yi-Sheng Lai, Chun-Ju Lin, Yu-Ting Huang, Shawn Chang, "Reliability Evaluation of the HV nLDMOS with Embedded Stripe-type SCR Structures", IEEE International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, pp.Y1-8-1~Y1-8-4, May 2014.
  96. Shen-Li Chen*, Chun-Ju Lin, Yi-Sheng Lai, Yu-Ting Huang, and Shawn Chang, "ESD Robustness Evaluation in 60-V nLDMOS DUTs by Different Layout Types," 2014 Symposium on Nano Device Technology (SNDT-2014), Hsinchu, Taiwan, pp.HF-12-1~HF-12-4, May 2014.
  97. Shen-Li Chen*, Yi-Sheng Lai, Chun-Ju Lin, Shawn Chang, and Yu-Ting Huang, "A Study of ESD Robustness in the HV LDMOS with Super-Junction Structures," 2014 Symposium on Nano Device Technology (SNDT-2014), Hsinchu, Taiwan, pp.HF-5-1~HF-5-4, May 2014.